KGKumar GauravStaff Data Architect

Intel, via UST · 2017 - 2018

Processor Validation Frameworks

ATMS and UDL: Python and AWS frameworks that use compiler-style models to generate every feature combination a processor must pass before release, so coverage is designed, not guessed.

The problem

Before a processor ships, every feature has to be validated in every meaningful combination. Writing those cases by hand does not scale, and a missed combination is expensive.

Key decisions

  • Model each feature as a grammar, so combinations are generated rather than hand-written.
  • Explore the full combination space first, then prune with explicit rules.
  • Keep the frameworks reusable across processor programs and feature areas, such as Bluetooth.
  • Run suites on AWS so coverage scales with compute, not headcount.

Outcome

Validation teams could generate complete, repeatable coverage for each feature area before release. I led a team of seven on the program, and the work earned a Certificate of Appreciation from the Intel engagement.

PythonAWSTest AutomationCompiler DesignCombinatorics

Architecture flow

  1. Feature specifications
  2. Compiler-style models: grammar and rules
  3. Combination generator
  4. Generated test suites
  5. Execution on AWS
  6. Results and coverage reporting

More architecture work

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